September 16, 2020

BUT11AF DATASHEET PDF

BUT11AF datasheet, BUT11AF pdf, BUT11AF data sheet, datasheet, data sheet, pdf, Fairchild Semiconductor, NPN Silicon Transistor. BUT11AF. GENERAL DESCRIPTION. High-voltage, high-speed glass- passivated npn power transistor in a SOT envelope with electrically. BUT11AF NPN Silicon Transistor. Absolute Maximum Ratings TC=25°C unless otherwise noted. Symbol VCBO Parameter Collector-Base Voltage: BUT11AF.

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August 2 Rev 1. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification.

Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.

The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. Bkt11af in whole or in part is prohibited without the prior written consent of the copyright owner.

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Oscilloscope display for VCEOsust. Region of permissible DC operation. Switching times waveforms with inductive load. Typical base-emitter and collector-emitter saturation voltages. Test circuit inductive load. Typical base-emitter saturation voltage.

BUT11AF Datasheet

No liability will be accepted by the publisher for any consequence of its use. Product specification This data sheet contains final product specifications. Normalised power derating and second breakdown curves. Stress above one or more of the limiting values may cause permanent damage to the device.

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Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied.

UNIT – but1a1f 1. Observe the general handling precautions for electrostatic-discharge sensitive devices ESDs to prevent damage to MOS gate oxide. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

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Transistor BUT11AF, NPN, TOF

Reverse bias safe operating area. SOT; The seating plane is electrically isolated from all terminals.

Switching times waveforms with resistive load. August 4 Ptot max and Ptot peak max lines. Refer to mounting instructions for F-pack envelopes.

Test circuit resistive load. Typical DC current gain. August 7 Rev 1. Forward bias safe operating area. August 8 Rev 1.

Test circuit for VCEOsust. Extension for repetitive pulse operation.